Ex Parte LINN et al - Page 1



               The opinion in support of the decision being entered today was not      
               written for publication and is not binding precedent of the Board.      
                                                                Paper No. 21           
                      UNITED STATES PATENT AND TRADEMARK OFFICE                        
                                     ____________                                      
                          BEFORE THE BOARD OF PATENT APPEALS                           
                                  AND INTERFERENCES                                    
                                     ____________                                      
             Ex parte JACK H. LINN, ROBERT K. LOWRY and GEORGE V. ROUSE                
                                     ____________                                      
                                 Appeal No. 2002-1981                                  
                              Application No. 09/316,580                               
                                     ____________                                      
                                       ON BRIEF                                        
                                     ____________                                      
          Before BAHR, BLANKENSHIP, and POTEATE, Administrative Patent                 
          Judges.                                                                      
          POTEATE, Administrative Patent Judge.                                        

                                  DECISION ON APPEAL                                   

               This is an appeal under 35 U.S.C. § 134 from the final                  
          rejection of claims 1-5, 7-10 and 13-22.  Claims 1 and 7 are                 
          representative of the subject matter on appeal and are                       
          reproduced below:                                                            
          1.   A silicon-on-insulator integrated circuit, comprising:                  
               (a) a handle die;                                                       
               (b) a substantially continuous silicide layer over said                 
          handle die;                                                                  
               (c) a substantially continuous first dielectric layer                   
          overlying one side of said silicide layer;                                   




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