Ex Parte Hady - Page 2

              Appeal 2007-1756                                                                     
              Application 10/185,476                                                               
                                         INVENTION                                                 
                    The invention is directed to a system which includes a network                 
              processor and a host processor.  The system is implemented such that writes          
              by the network processor to memory associated with the network processor             
              also write to the memory associated with the host processor.  See page 8 of          
              Appellant’s Specification.  Claims 1 and 35 are representative of the                
              invention and reproduced below:                                                      
                          1.  A method comprising:                                                 
                          processing a network message in a network processor; and                 
                          writing data associated with said message to a memory                    
                    associated with the network processor and to a memory associated               
                    with a host processor coupled to said network processor using a single         
                    network processor instruction to write to both memories.                       
                          35. A general purpose processor-based system comprising:                 
                          a general purpose processor;                                             
                          a host bus coupled to said general purpose processor; and                
                          a storage coupled to said general purpose processor to be                
                    written with data associated with a network message by a network               
                    processor and by said general purpose processor, said network                  
                    processor coupled to said general purpose processor-based system by            
                    the host bus.                                                                  

                                          REFERENCES                                               
                    The references relied upon by the Examiner are:                                
              Bass              US 6,675,163 B1        Jan. 6, 2004                                
                                                       (filed Apr. 6, 2000)                        
              Kale              US 6,754,735 B2        Jun. 22, 2004                               
                                                       (filed Dec. 21, 2001)                       



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