Appeal No. 94-0166 Application No. 07/815,316 appeal are represented by independent claim 1 which is reproduced below: 1. A method of integrated circuit manufacturing comprising the steps of: forming a plurality of spaced apart gate electrodes, said electrodes comprising a conducting structure, an insulating top layer, and dielectric sidewalls; depositing a layer of conformal dielectric, said layer contacting at least a portion of said gate electrodes and the substrate between the gate electrodes; depositing a layer of photoresist; forming openings in said photoresist which expose portions of said conformal dielectric between said gate structures, said openings being larger than the desired contact area; etching at least a portion of said conformal dielectric layer to expose a portion of the substrate between said gate structures; and forming a landing pad contacting said substrate. As evidence of obviousness, the examiner relies on the following references: Liu et al. (Liu) 5,049,517 Sep. 17, 1991 (filed Nov. 7, 1990) Fazan et al. (Fazan) 5,084,405* Jan. 28, 1992 (filed Jun. 7, 1991) * The Examiner’s Answer incorrectly cites 5,048,405 on page 2 thereof. 2Page: Previous 1 2 3 4 5 6 7 8 9 10 NextLast modified: November 3, 2007