Ex parte BLIXT - Page 2




          Appeal No. 95-2572                                         Page 2           
          Application 08/157,451                                                      
          07/627,864, filed 17 December 1990 (now abandoned), under                   
          35 U.S.C. § 120.  He also claims the priority of Swedish patent             
          application 9000083-7, filed 10 January 1990, under 35 U.S.C.               
          § 119.  (Paper 19 (Req. Appl'n under 1.62) at 2.)                           
               The subject matter of the invention relates to a graphics              
          processor for raster displays.  (Paper 1 at 1.)  Claim 15, the              
          only independent claim, defines the subject matter as follows               
          (Paper 22 (Amdt. entered 11 May 1994) at 1-2, enumeration from              
          Fig. 2 ):1                                                                     
                         A graphics processor 16 for writing                          
               information representing at least a part of an image                   
               into an image buffer 18 of predetermined size,                         
               comprising:                                                            
                    (a) high level graphics processor means 30 for                    
                         converting high level graphics instructions                  
                         into low level graphics instructions, at                     
                         least some of which contain pixel data;                      
                    (b) queue memory means 34 connected to said high                  
                         level graphics processor means 30, for                       
                         receiving and storing said low level graphics                
                         instructions in the order they are generated                 
                         by said high level graphics processor                        
                         means 30; and                                                
                    (c) low level graphics processor means 32                         
                         connected to said queue memory means 34 and                  
                         said image buffer 18, for reading and                        
                         executing said low level graphics                            
                         instructions from said queue memory means 34                 
                         one after the other and for repeatedly                       
                         copying at least some of said pixel data into                
                         different memory locations of said image                     

               1    Figure 1 should be labeled "Prior Art" for clarity.               
          Manual of Patent Examining Procedure (MPEP) § 608.02(g).                    





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