Appeal No. 96-0137
Application 08/074,978
memory, all discrete manufactured physical logic devices that have (1) a template of an architectural
type wherein at least one of said Boolean logic equations in said set fits and (2) an information file
wherein all said selected user constraints are met,
automatically ordering, via said processor, independent of said input and receptive of said
possible solutions list from said step of identifying, the discrete manufactured physical logic devices
contained in said possible solutions list into an ordered possible solutions list,
automatically fitting from the stored selected user partitioning directives from said memory, via
said processor, independent of said input and receptive of said ordered possible solutions list, each of
said Boolean equations to each of said discrete manufactured physical logic devices in said ordered list
of possible solutions according to said partitioning directives, said step of fitting comprising the steps of:
(i) trying to fit the pins and pin assignments of each device in said ordered possible solutions list
to said set of Boolean equations,
(ii) adding only those devices that fit in the aforesaid step (i) to a device solution list,
mapping, via said processor, said set of Boolean equations onto the discrete manufactured
physical logic devices in said list of device solutions.
The references relied upon by the examiner as evidence of obviousness are:
LOGIC/iC software, PLD Compiler Manual, ISDATA GmbH, Haid-und-Neu-StraBe 7, D-7500
Karlsruhe, West Germany, copyrighted 1987 & 1988.
“PLD-design software meets the challenge of multiple-device PLD applications”, Small, Charles H.,
EDN, vol. 33, no.4, Feb. 18, 1988, pages 61-65.
APS Text Search and Retrieval Manual, Planning Research Corporation, 1986 revision, pages 2-9, 4-
3 and 4-4.
3
Page: Previous 1 2 3 4 5 6 7 8 9 10 Next
Last modified: November 3, 2007