Appeal No. 96-0633
Application 07/971,041
Independent claim 1 is reproduced below:
1. A semiconductor wafer structure comprising:
a semiconductor substrate including a plurality of
semiconductor device regions each of bearing a semiconductor
device, and a plurality of dicing line regions separating said
device regions;
an insulation layer of a first material on a surface of
said substrate, wherein said insulation layer has a plurality
of apertures, each aperture surrounding a respective one of
said device regions and electrically isolating each said
device region from the others; and
said apertures are each filled with a layer of a second
material confined to be within said aperture.
The following references are relied by the examiner:
Esquivel et al. (Esquivel) 4,977,439 Dec. 11, 1990
Asano et al. (Asano) 5,128,744 July 7, 1992
(filed Sept. 12, 1989)
Ishii et al. (Ishii)
(Japanese Kokai) 2-2116522 Aug. 22, 1990
Claims 1 to 15 and 19 to 21 stand rejected under 35
U.S.C.
Our understanding of this reference is based upon a translation2
provided by the Scientific and Technical Information Center of the Patent
and Trademark Office. A copy of the translation is included with this
opinion.
2
Page: Previous 1 2 3 4 5 6 7 8 9 10 11 12 13 Next
Last modified: November 3, 2007