Appeal No. 96-0908
Application 08/160,118
registers, explicitly or implicitly, but has not done so. The
examiner has failed to establish a prima facie case of
obviousness. The rejections of claim 8 and 20, and dependent
claims 9 and 21, over Auslander and Diefendorff and Kawata and
Diefendorff are reversed.
(9) Claims 10 and 22
Claims 10 and 22 recite a plurality of different types of
status bits, which limitation we held to have been obvious in
connection with the analysis of claim 7.
Claims 10 and 22 further recite that the register pair
conditional store instruction designates a particular one of
the plurality of different types of status bits for
controlling which register is stored in memory. Appellants
argue that "neither Auslander et al nor Diefendorff et al
teach [sic] or suggest the particular conditional operation
claimed" (Br12). A similar argument is made with respect to
the rejection over the combination of Kawata and Diefendorff
(Br22).
In our opinion, one of ordinary skill in the art had
sufficient knowledge to generalize the two register
conditional store instruction of Diefendorff, which is based
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