Appeal No. 96-3359
Application 08/204,592
data is transferred. A bus couples the processors together
and permits them to snoop the bus for memory transfers.
The claims all stand rejected under 35 U.S.C. § 103 as
unpatentable over Arnold in view of Tipley. Claims 1-3 and
17-19 are further rejected under 35 U.S.C. § 103 as
unpatentable over Tetzlaff in view of Chan and further in view
of Tipley. Claim 24 is further rejected under 35 U.S.C. § 103
as unpatentable over Tetzlaff in view of Chan and further in
view of Tipley and still further in view of Santeler.
Arnold in view of Tipley
Arnold shows in Figure 1 a distributed computer system
with remote processors having cache memory. A system control
unit centrally locks the caches and maintains a reserve list.
Tipley teaches in Figure 1 a distributed processor system
wherein each processor has its own cache controller for
snooping the bus. Tipley teaches that such snooping is done
to maintain cache coherency.
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