Appeal No. 1997-1688
Application 08/515,752
An ESD protection circuit for protecting a device which has a
power supply which is at a first voltage of approximately 3.3
volts and which interfaces with devices that have a supply voltage
which
is at a second voltage of approximately 5 volts, said ESD
protection circuit comprising:
a bond pad, said bond pad subjected to said first voltage or
said second voltage;
a switching element connected to said bond pad, said
switching element becomes conductive upon the occurrence of an ESD
event; and
a primary protection device connected between said switching
element and ground for dissipating an ESD signal, said primary
protection device is isolated from said bond pad except during
said ESD events.
The references relied upon by the examiner as evidence of
obviousness are:
Murayama JP-58-162065 Sep. 26, 1983
Misu et al. (Misu) JP-61-30075 Feb. 12, 1986
Taira EP-0257774 Mar. 02, 1988
Tailliet EP-0568421 Nov. 03, 1993
Isono et al. (Isono) JP-5-335495 Dec. 17, 1993
Claims 28-33 stand rejected under 35 U.S.C. § 103 as being
unpatentable over Isono, Tailliet, Misu, Murayama or Taira.
The respective positions of the examiner and the appellants
with regard to the propriety of these rejections are set forth in
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