Ex parte WILSON et al. - Page 5




                Appeal No. 1997-3134                                                                                                       
                Application 08/434,163                                                                                                     


                second register to said one of said control registers specified by said address responsive to said first                   

                instruction command; in a read operation, said control register unit causing data to be transferred from                   

                said one of said control registers to said second register responsive to said first instruction command."                  

                We note that independent claim 15 recites similar language.  Appellants argue that Andrews does not                        

                read from or write to any component outside of the TAP or the TAP's internal TDRs.  Appellants                             

                further pointed out that Swoboda does not teach accessing control registers for reading or writing                         

                either.                                                                                                                    

                        In response to Appellants' argument that Andrews teaches away from the claimed invention, the                      

                Examiner responds on page 8 of the Examiner's answer stating that Andrews does teach a TAP having                          

                registers BICSC and ITV TDR for testing.  The Examiner further argues that these registers are not                         

                excluded from the inclusion of the use of TAP for functional testing.  In response to Appellants'                          

                argument that the references do not teach reading from or writing to the control register, the Examiner                    

                responds by arguing that although Andrews does not explicitly teach reading from or writing to the                         

                control register, Andrews does suggest that boundary scan registers BSR apply a test vector at                             

                selected input or nodes of the CMOS modules during a test mode.  The Examiner argues that it would                         

                been obvious to one of ordinary skill art in the art to realize that the features of writing to and reading                

                from the CMOS modules are encompassed during applying test vector to the CMOS modules during                               

                testing.                                                                                                                   


                                                                    5                                                                      





Page:  Previous  1  2  3  4  5  6  7  8  9  Next 

Last modified: November 3, 2007