Appeal No. 1999-0880
Application No. 08/700,610
which is learned by a receiver in a program mode within a
system for controlling the position of a barrier.
Finally, we turn to the rejections of claims 20 through
45 under 35 U.S.C. § 251 and under 35 U.S.C. § 112, first
paragraph. We treat these rejections together because they
are both based on the examiner’s position that there is no
support for a “processor controlled code location pointer” or
memory selection means in claims 20, 22 and 35, for a
“software controlled code location pointer” or memory selector
in claims 21, 23, 28, 30 and 40, or for a microprocessor
incrementing the code location pointer to select the memory
address in claim 34.
The examiner contends that the only reference in the
specification to a “code location pointer” is at column 4,
line 55, and such is directed to switch 23 which is the only
code location pointer disclosed. The examiner dismisses the
flow charts of Figures 3 and 4 because the description of the
flowcharts in the specification does not specify that the
flowcharts represent software or are in any way limited to a
processor control as a second embodiment of the invention.
The examiner takes the position that any “control” must be
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