Appeal No. 1997-3241
Application 08/442,726
first and then the next bit and so on until all bits of the
counter have been updated to reflect the count.
We next consider the limitation “comparing when said
ripple counter is still incrementing.” On page 8 of the
brief, Appellants assert that this limitation means that there
is an overlapping of the incrementing and comparing steps. On
page 16 of the specification, Appellants identify that “the
pipelining technique allows the lower order bits of each LRU
counter to be compared to the value on the reference bus at
the same time when the higher order bits of the LRU counter
are still incrementing,” where the LRU counter is a ripple
counter. Accordingly, we find that the limitation of
“comparing when said ripple counter is still incrementing,”
means that a comparison is made between the lower order bits
of the counter and a reference value while the count is
propagating through the higher order bits, i.e., comparison of
lower order bits is made before the higher order bits of the
counter have been updated to reflect the count.
Having determined the scope of the claims, we next turn
to the art applied in the rejection. Miu discloses using a
counter to initialize a memory. As described in Miu, column
10
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