Appeal No. 1997-4092
Application No. 08/181,404
array including a plurality of flag cells. Each of the flag
cells corresponds to one of the refresh blocks, and stores
data representing refresh status of the corresponding refresh
block.
Claim 1 is illustrative of the claimed invention, and it
reads as follows:
1. A nonvolatile semiconductor memory system comprising:
a nonvolatile memory cell array including a plurality of
nonvolatile memory cells arranged in matrix, said nonvolatile
memory cell array being divided into refresh blocks;
a flag cell array including a plurality of nonvolatile
flag cells each of which corresponds to one of said refresh
blocks and stores data representing refresh status of the
corresponding refresh block.
The reference relied on by the examiner is:
Hollerbauer 5,283,885 Feb. 1,
1994
(effective filing date Apr. 12, 1989)
Claims 1 through 26 and 30 through 51 stand rejected
under 35 U.S.C. § 102(e) as being anticipated by Hollerbauer.
Reference is made to the final rejection, the briefs and
the answer for the respective positions of the appellants and
the examiner.
OPINION
2
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