Ex parte SHRINKLE - Page 7




          Appeal No. 1998-0817                                                        
          Application 08/610,976                                                      


          20 recites "a phase locked loop, in response to the control                 
          signals generated by the microprocessor, for receiving the                  
          format data read by the read channel during the write                       
          operation and for generating a clock having a frequency and                 
          phase that is equal to the frequency and phase of the format                
          data read from the format portion of the record compensated                 
          for the deviation in the actual rotational speed of the disk                
          from its nominal speed."  We fail to find that Rooke teaches                
          these limitations as well.                                                  
               Therefore, we do not agree with the Examiner that claims               
          14-20 and 22-24 are anticipated by Rooke.  Furthermore, we                  
          note that the rejection of claim 21 is based upon finding                   
          these limitations in Rooke.  Therefore, we do not agree that                
          claim 21 which is                                                           




          dependent upon claim 20 is properly rejected under 35 U.S.C.                
          § 103 as being unpatentable in view of Rooke and Gold for the               
          reasons given above with respect to claim 20.                               
               In view of the foregoing the decision of the Examiner                  
          rejected claims 14 through 24 is reversed.                                  
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