Appeal No. 1998-1512
Application No. 07/993,783
BACKGROUND
The invention is directed to a method and apparatus for utilizing Translation
Lookaside Buffers (TLB) for maintaining page tables in a paging unit in a computer
system. Claim 3 is reproduced below.
3. A paging unit for performing linear address to physical address translations
in a computer system, said paging unit comprised of:
a) a first storage area for storing a plurality of page table entries, each of
said page table entries containing a physical address to a page in task storage;
b) a second storage area for storing a subset of said page table entries in
said first storage area;
c) means for comparing a linear address to the contents of said second
storage area and if said linear address is in said second storage area, providing
said page table entry as a physical address;
d) control means for pre-loading said second storage area with page table
entries corresponding to a task, said page table entries saved from a prior
execution of said task; and
e) means for identifying an entry in said first storage area from said linear
address.
The examiner relies on the following references:
Bryg et al. (“Bryg”) 5,060,137 Oct. 22, 1991
Motorola, Inc., MC88200 Cache/Memory Management User’s Manual § 2, “Memory
Management,” pp. 2-1 to 2-34 (1988) (“MC88200 User’s Manual”)
Claim 3 stands rejected under 35 U.S.C. § 102 as being anticipated by Bryg.
Claim 17 stands rejected under 35 U.S.C. § 102 as being anticipated by the
MC88200 User’s Manual.
Claims 1, 2, 9, and 10 have been allowed.
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