Ex parte LAFONTAINE et al. - Page 2




          Appeal No. 1998-1623                                                        
          Application 08/433,625                                                      



                                 DECISION ON APPEAL                                   
               This is a decision on appeal from the final rejection of               
          claims 20 through 37, all of the claims pending in the                      
          application.  Claims 1 through 19 have been canceled.                       
               The invention relates to a method for joining a                        
          semiconductor integrated circuit chip to a chip carrier                     
          substrate and the resulting chip package.                                   
               Independent claim 20 is reproduced as follows:                         
               20.  A method for fabricating a semiconductor chip                     
          package, comprising the steps of:                                           
               bringing a region of solder, mounted on a chip contact                 
          pad of a semiconductor integrated circuit chip, into contact                
          with a carrier contact pad of a chip carrier substrate, which               
          solder region has a composition which includes at least a                   
          first component and a second component and which carrier                    
          contact pad includes a pad region having a composition which                
          includes at least a third component; and                                    
               forming a region of material at and/or adjacent to the                 
          interface between said solder region and said carrier contact               
          pad, which material region has a composition which includes at              
          least said second component and said third component, while                 
          using said solder region and said carrier contact pad as                    
          sources of said second component and said third component,                  
          said material region having a melting temperature which is                  
          lower than that of said solder region and of said carrier                   
          contact pad.                                                                
               The reference relied on by the Examiner is as follows:                 


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