Ex parte GLASS - Page 4




          Appeal No. 1998-2879                                                        
          Application No. 08/474,856                                                  


          as being unpatentable over Matsuo in view of Redwine.                       
               Claims 4 and 11 stand rejected under 35 U.S.C. § 103 as                
          being unpatentable over Matsuo in view of Hoffman.                          
               Reference is made to the briefs and the answer for the                 
          respective positions of the appellant and the examiner.                     
                                       OPINION                                        
               With the exception of the 35 U.S.C. § 102/35 U.S.C. § 103              
          rejections of claims 18 and 19, all of the rejections are                   
          reversed.                                                                   
               Turning first to the 35 U.S.C. § 102/35 U.S.C. § 103                   
          rejections based upon the teachings of Matsuo, appellant                    
          argues (Brief, page 6) that:                                                
                    In addressing this rejection, the first                           
                    problem is that the DIB buffer circuit                            
                    [in Matsuo] is an [sic, a] “data input                            
                    buffer circuit” (cf. ‘583, Column 5,                              
                    line 66 through Column 6, line 13 wherein                         
                    is found a description of this buffer                             
                    circuit).  The control signal DiC_ is not                         
                    buffered by this circuit, but controls the                        
                    passage of data signals through this data                         
                    buffer circuit.                                                   
               Matsuo clearly explains (column 2, lines 21 through 25;                
          column 4, lines 21 through 43; and column 5, line 66 through                
          column 6, line 13) that data, and not the control signal, is                

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