Appeal No. 2000-0372
Application No. 08/421,338
The examiner contends that Stewart’s RAM table is “functionally equivalent” to the
cascaded RAM of the instant claims because “it also stores the input data and has a
d
capability of addressing 2 bits” [answer-page 4]. The examiner takes the position that
Stewart does not teach the claimed means for sequentially addressing and reading the
random access memories but, instead, uses a search method to perform the sequential
addressing and reading of the memory. Thus, the examiner turns to Dujari for a method of
sequential addressing and reading using pointers, identifying, in the abstract, column 1,
lines 40+, column 2, lines 28+, and column 7, lines 40-65, the calculation of a next address
by adding/concatenating a base address (n1) with an offset (ni). The examiner then
concludes that it would have been obvious to use Dujari’s table walking/search process in
Stewart’s header swapping device to search for the correct physical address to swap in
order to “improve the efficiency of the addressing and reading process of Stewart’s, who
also teaches searching through a table for the correct address. The function of the means
for finding the output value as a result of the addressing of the random access memory is
taught by Stewart through performing the search for the physical address in the memory
and outputting it (column 2 lines 40-50)” [answer-page 5].
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