Appeal No. 1999-0007
Application 08/688,218
place and route databases within a configuration database (brief-
page 15). Additionally, Appellant contends that Dai’s Figure 14
illustrates the use of one place and route element 112 twice in a
flow diagram rather than two place and route elements 112 (reply
brief-page 2).
We agree, Dai teaches the interconnections for an emulation
circuit to emulate an integrated circuit (abstract). As such,
logic chips 18 are interconnected via interconnect chips 20
(column 4, line 67 - column 5, line 4), using a place and route
module 112 (column 22, lines 66-68). We see no motivation to use
Dai’s place and route module in Upton since Dai has nothing to do
with any process technology. Dai merely establishes that place
and route modules are known.
Furthermore, having reviewed the pertinent sections of Dai,
columns 22-24, we agree with Appellant that only one place and
route module is disclosed.
The Federal Circuit states that "[t]he mere fact that the
prior art may be modified in the manner suggested by the Examiner
does not make the modification obvious unless the prior art
suggested the desirability of the modification." In re Fritch,
8
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