Ex parte ECONOMIKOS et al. - Page 5







            Appeal No. 1998-3071                                                                              
            Application 08/477,054                                                                            



            states at lines 3-6 of the abstract that the "interconnect device is fully customizable or        
            programmable upon the upper surface to accommodate various electrical components                  
            and connectivity to those components."  A similar statement is made in Sommerfeldt’s              
            Summary of the Invention at the bottom of column 2 at lines                                       
            64 and 65 which is that "the improved MCM hereof is not only fully programmable on only           
            the surface layer."  We identified certain layers in Sommerfeldt as comprising the claimed        
            "single sublayer" in the last lines of each independent claim on appeal.  These claims            
            require nothing more.                                                                             
                   Finally, we turn our attention to the third point at pages 6 and 7 of the request.         
            There, appellants alleged that we misapprehended whether Sommerfeldt discloses the                
            inter pad limitation of independent claims 1, 15 and 24.  The context in which we                 
            discussed the inter pad spacing at the top of page 10 is the whole paragraph bridging             
            pages 9 and 10.  The basic premise is that the bonding pads may be connected in any               
            manner in association with the use of connective links 58 shown in Figures 6 and 7.  All of       
            this is caught up in the context of what we considered to be a chip site as discussed in this     
            paragraph.  All that the claim requires is that a pair of connection pads at one chip site be     
            separated from the chip connection pads at another site by a space greater than any of the        


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