Ex parte INOUE et al. - Page 2




          Appeal No. 2000-1282                                                        
          Application No. 08/813,140                                                  


          performed in a two-phase operation in first and second                      
          portions of a digital memory.                                               
               Claim 1 is illustrative of the claimed invention, and it               
          reads as follows:                                                           
                    1.  Apparatus for recording a digital signal and                  
               redundancy signals such that said digital signal may be                
               reproduced by error correcting the recorded digital                    
               signal using the redundancy signals, comprising                        
                    a digital memory,                                                 
                    a digital storage system providing recordation of                 
               digital information,                                                   
                    error correcting circuitry receiving a group of                   
               digital signals and generating therefrom redundancy                    
               signals to be used in error correction of said digital                 
               signals, and                                                           
                    control circuitry controlling operations of said                  
               memory, said digital storage system and said error                     
               correcting circuitry to receive digital signals from a                 
               signal source, error-encode and record the error-encoded               
               digital signals, wherein                                               
                    said control circuitry, in a first phase of a                     
               recording operation performed during a first period of                 
               time, causes a first error-encoded digital signal in a                 
               first portion of said memory to be forwarded to said                   
               digital storage system for recordation, and causes                     
               digital signals from said signal source to be stored in                
               place of said first error-encoded digital signal, while                
               simultaneously causing said error correcting circuitry to              
               error encode digital signals stored in a second portion                
               of said digital memory to form an error-encoded result                 
               and store said error-encoded result into said second                   
               portion of said digital memory,                                        
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