Appeal No. 2001-0050
Application No. 08/753,883
We are cognizant of the Examiner’s comments (Answer, pages 3
and 4) which assert that Nishikawa’s description of the frequency
doubling and multiplexing circuitry is evidence of “... the same
functionality of double scanning as claimed.” The mere fact,
however, that elements in the prior art Nishikawa reference may
perform the same function as those claimed, does not satisfy the
Examiner’s burden of showing that all of the claimed elements are
present in Nishikawa so as to support a prima facie case of
anticipation. Our review of Nishikawa reveals that the only
description of the implementation of the frequency doubling
operation appears at column 2, lines 28-34. This passage describes
the doubling of the frequency of stored left and right image
signals by reading out from memory at a read speed which is twice
that of the writing speed, a disclosure which does not satisfy the
“... repeatedly scanning twice each line” limitation of the
appealed claims. Further, since the Examiner has, in our view,
improperly interpreted the disclosure of Nishikawa, the issue of
the obviousness of this feature has not been addressed.
In view of the above discussion, since all of the claim
limitations are not present in the disclosure of Nishikawa, the
Examiner’s 35 U.S.C. § 102(b) rejection of claims 1-3 is not
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