Ex Parte Lauffer et al - Page 3




            Appeal No. 2002-0942                                                          Page 3              
            Application No. 09/553,715                                                                        


            the claims under appeal.  Accordingly, we will not sustain the examiner's rejection of            
            claims 1, 3 and 5 to 9 under 35 U.S.C. § 103.  Our reasoning for this determination               
            follows.                                                                                          


                   In rejecting claims under 35 U.S.C. § 103, the examiner bears the initial burden           
            of presenting a prima facie case of obviousness.  See In re Rijckaert, 9 F.3d 1531,               
            1532, 28 USPQ2d 1955, 1956 (Fed. Cir. 1993).  A prima facie case of obviousness is                
            established by presenting evidence that would have led one of ordinary skill in the art to        
            arrive at the claimed invention.  See In re Fine, 837 F.2d 1071, 1074, 5 USPQ2d 1596,             
            1598 (Fed. Cir. 1988) and In re Lintner, 458 F.2d 1013, 1016, 173 USPQ 560, 562                   
            (CCPA 1972).                                                                                      


                   Claim 1, the sole independent claim on appeal, reads as follows:                           
                         A method for producing a capacitor embedded in a printed circuit board               
                   comprising the steps of                                                                    
                         selecting a first conductor foil and a second conductor foil;                        
                         forming clearance holes in said first and second conductor foils;                    
                         selecting a dielectric material;                                                     
                         coating the dielectric material on at least one side of the first conductor foil     
                   to a thickness of approximately 0.0015 inch; and                                           
                         layering the coated foil with said second conductor foil with clearance              
                   holes on top of the coating of dielectric material thereby to form a capacitive            
                   structure for being embedded in a printed circuit board.                                   










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