Appeal No. 2001-0482
Application No. 09/186,078
1. A method of manufacturing a semiconductor device having an insulated trench formed in a
semiconductor substrate or in an epitaxial layer on the semiconductor substrate, which
method comprises:
forming a pad oxide layer on a main surface of the substrate or epitaxial layer;
forming a barrier nitride layer having an upper surface on the pad oxide layer;
providing a mask having an opening on the barrier nitride layer;
etching to remove portions of the underlying barrier nitride and pad oxide layers and to form
a trench in the substrate or epitaxial layer, which trench has a surface comprising side surfaces
intersecting the main surface at edges;
ion implanting impurities, at an acute angle, into a portion of the side surfaces and a portion
of the main surface proximal to the edges for increasing the oxidation rate of the ion implanted
portions;
forming an oxide liner on the surface of the trench, on the edges, and in contact with the pad
oxide layer, the oxide liner having a thickness at the edges on the ion implanted portions greater
than at the remainder of the trench surface;
removing the barrier nitride layer and pad oxide layer; and
forming a gate oxide layer on the main surface in contact with the oxide liner, the gate oxide
layer having a thickness proximal to the edges greater than or equal to that of the remainder of the
gate oxide layer.
The Examiner relies on the following prior art:
Fulford, Jr. et al. (Fulford) 5,874,346 Feb. 23, 1999
(filed May 23, 1996)
Gardner et al. (Gardner) 5,891,787 Apr. 06, 1999
(filed Sep. 04, 1997)
Son et al. (Son) 5,904,538 May 18, 1999
(filed Sep. 04, 1997)
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