Appeal No. 2002-0897
Application 09/303,020
i.e., claim 1. See In re Ochiai, 71 F.3d 1565, 1566 n.2, 37
USPQ2d 1127, 1129 n.2 (Fed. Cir. 1995); 37 CFR
§ 1.192(c)(7)(1997).
Doan discloses a method of forming a structure in and on a
semiconductor wafer, comprising forming a layer (22) on a top
surface (26) of the semiconductor wafer and within a cavity (24)
formed in the wafer such that at least a portion of the cavity
remains open (col. 3, lines 19-22; figure 5), chemical mechanical
polishing (CMP) a portion of the layer formed above a plane
defined approximately by a top surface of the semiconductor wafer
(col. 3, lines 23-35; figure 6), and megasonically cleaning the
semiconductor wafer including the open portion of the cavity
(col. 3, lines 36-59). Doan does not disclose brush scrubbing
the wafer. Doan, however, teaches that “[o]ther techniques are
also expected to be usable to remove chemical mechanical
polishing slurry residuals from the outwardly open polysilicon
cavity” (col. 4, lines 12-15).
Roy discloses a post-CMP process which includes
megasonically cleaning a wafer and then brush scrubbing the wafer
to further remove particles and ionic and metallic contaminants
(col. 3, lines 10-16; col. 4, lines 23-25; col. 5, lines 22-39).
Roy does not disclose applying the process to a surface having a
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