Appeal No. 2002-1241
Application No. 08/883,141
From the teaching in Reese’s abstract, of “selectively enabling or disabling echo
cancellation...” and at column 5, lines 26-32,
. . . The CPU 45 monitors the data stream from the parallel access circuit and, in turn,
issues configuration control signals to a path multiplexer 56 in order to determine
whether each SEND-IN time slot value is to be routed through one of echo canceler
modules 46 or whether each SEND-IN time slot is to be routed directly into a SEND-
OUT transmission frame, . . .
one might conclude that Reese, also, discloses performing echo cancellation, as needed, as
claimed. However, in the next paragraph, at column 5, lines 37-57, it is clearly disclosed that the
path multiplexer 56 routes each received B-channel value to a corresponding one of echo
canceler modules 46 and that when echo cancellation is disabled on a given B-channel, the path
multiplexer 56, in response to a control flag, by routing each incoming value of the
corresponding time slot from signal line 60 into a corresponding outbound time slot on signal
line 62. But, when echo cancellation is to be applied to a B-channel, the path multiplexer 56
obtains the processed signal (i.e., the signal subjected to echo cancellation in module 46) and
multiplexes that processed signal into the appropriate time slot of the outbound transmission
frame provided to line 62. Thus, path multiplexer
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