Ex Parte ROEDIGER et al - Page 3




              Appeal No. 2002-0270                                                                                      
              Application No. 09/099,584                                                                                

                     Claims 2-5 and 8-18 stand rejected under 35 U.S.C. § 102 as being anticipated                      
              by Aho.                                                                                                   
                     We refer to the Final Rejection (Paper No. 6) and the Examiner’s Answer (Paper                     
              No. 12) for a statement of the examiner’s position and to the Brief (Paper No. 11) and                    
              the Reply Brief (Paper No. 13) for appellants’ position with respect to the claims which                  
              stand rejected.                                                                                           


                                                       OPINION                                                          
                     “Anticipation is established only when a single prior art reference discloses,                     
              expressly or under principles of inherency, each and every element of a claimed                           
              invention.”  RCA Corp. v. Applied Digital Data Sys., Inc., 730 F.2d 1440, 1444, 221                       
              USPQ 385, 388 (Fed. Cir. 1984).                                                                           
                     Instant claim 2 recites calculating a “lifetime” of at least one “fixed processor                  
              resource” defined by an instruction within a loop in a computer program residing in                       
              memory that is coupled to at least one processor.  A “lifetime” is defined as a set of                    
              instructions that operate with a program variable, either by defining or using the                        
              variable.  (Spec. at 6, ll. 10-15.)  A “fixed processor resource” is defined as a                         
              “bottleneck register,” synonymous with a “fixed processor register,” which may include                    
              any fixed resource in the processor or available to the processor.  Examples of “fixed                    
              processor resources” are fixed registers in a processor’s register set.  (See id. at 10, ll.              
              3-16.)                                                                                                    
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