Ex Parte ITOH et al - Page 2




          Appeal No. 2003-0965                                                        
          Application No. 09/030,829                                                  


          to the HDC to request data be sent from the HDC to the MCU.                 
          (Specification, page 33, lines 12-13).  The HDC sends a response            
          status signal (acknowledgment signal ACK) to the MCU, which                 
          causes the MCU to read a "read data" (a data word) from the HDC.            
          (Specification, page 33, line 19-33).  The timings of the ACK               
          signals are continuous, discrete, or a combination of both                  
          depending on the processing condition of the HDC.                           
          (Specification, page 25, lines 26-31).  For a single request                
          signal from the MCU, in a first mode the HDC sends one (discrete)           
          ACK signal, in a second mode the HDC sends plural (continuous)              
          ACK signals, and in a third mode some combination of the ACK                
          signals.                                                                    
               Claim 1 is representative of the claimed invention and is              
          reproduced as follows:                                                      
          1.   A data access unit including a hard disk controller and a              
          microcomputer unit connected to said hard disk controller, said             
          data access unit comprising:                                                
               clock synchronizing means for operating said hard disk                 
          controller and said microcomputer unit in synchronization with a            
          clock signal; and                                                           
               control means for controlling timing of outputting a hard              
          disk controller-to-microcomputer response status for each read              
          data depending on a processing condition of the hard disk                   
          controller, the timing of the output of the response status being           
          continuous, discrete or a combination thereof for each read data.           





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