Ex Parte CHIANG et al - Page 6




               Appeal No. 2003-1240                                                                                                    
               Application No. 09/304,964                                                                                              

               paragraph, as being indefinite for failing to particularly point out and distinctly claim the                           
               subject matter which applicants regard as the invention.                                                                
                       The recitation of “the receive port” in lines 2 through 3 of independent claim 13                               
               lacks proper antecedent in the claim.  Moreover, claim 13 is, at the least, misdescriptive                              
               of the disclosed invention.  The claim recites that “a data queue representing each of                                  
               the receive ports is assigned with at least one of the time slots.”  Appellants state (spec.                            
               at 13) that a single rules queue 102 may be assigned to each receive port of the IMS                                    
               (integrated multiport switch) 12, but the same paragraph also refers to “multiple rules                                 
               queue 102.”  The paragraph explains that rules queues 1 to 12 are provided for 10/100                                   
               MAC ports 1 to 12, a rules queue 13 may support gigabit MAC port 24, and a rules                                        
               queue 14 may be assigned to expansion port 30.  As described at pages 14 through 16                                     
               of the specification, IRC scheduler 104 (Fig. 4) arbitrates between the rules queues 102                                
               to allocate time slots in each scheduling cycle.  There is no clear disclosure of “a” single                            
               data queue that represents “each” (i.e., all) of the receive ports.  Nor is it                                          
               understandable how such a data queue might be assigned with “at least one” of the                                       
               time slots consistent with the remainder of the method set forth in claim 13.  The scope                                
               of the claim is thus indeterminate.                                                                                     







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