Appeal No. 2005-0859 Page 2
Application No. 10/015,965
a hardware circuit [HARD] allowing an inversion of an order
of bits of a word as a function of a value of the convention
signal during a transfer of the word between said electronic
module [MOD] and said microprocessor [PRC].
9. A data-processing system, comprising:
a hardware circuit [HARD];
a communication device [COM] for communicating a contention
[sic, convention] signal and a word to said hardware circuit
[HARD] from one of a microprocessor [PRC] and an electronic
module [MOD]; and
wherein said hardware circuit includes means for
implementing one of a direct convention and an indirect
convention of an order of bits of the words as a function of a
value of the convention signal.
THE REFERENCES
Muwafi et al. (Muwafi) 5,978,822 Nov. 2, 1999
Van Rensburg et al. US 2003/0004891 A1 Jan. 2, 2003
(Van Rensburg) (PCT filed Jan. 29, 2001)
Chiang 6,574,776 Jun. 3, 2003)
(filed Apr. 9, 1999)
THE REJECTIONS
The claims stand rejected as follows: claims 1, 3, 5, 7
and 9 under 35 U.S.C. § 102(b) as anticipated by Chiang; claims 2
and 6 under 35 U.S.C. § 103 as obvious over Chiang in view of Van
Rensburg; and claims 4 and 8 under 35 U.S.C. § 103 as obvious
over Chiang in view of Muwafi.
OPINION
We reverse the aforementioned rejections.
Independent claims 1 and 5 require a hardware circuit that
allows an inversion of an order of bits of a word as a function
of a value of a convention signal during a transfer of a word
between an electronic module and a microprocessor. Independent
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