Ex Parte Li et al - Page 2




              Appeal No. 2005-1219                                                                                     
              Application No. 09/774,192                                                                               
                     The references of record relied upon by the examiner as evidence of obviousness are:              
                     Guo et al. (Guo)    5,944,899            Aug. 31, 1999                                            
                     Yoshida             5,735,993            Apr.    7, 1998                                          
                     Claims 28, 33-39 and 42 stand rejected under 35 USC § 103 as unpatentable over Guo in             
              view of Yoshida.  For the details of this rejection reference is made to the examiner’s Answer.  For     
              appellants’ response to the examiner’s rejection reference is made to the Brief and Reply Brief for      
              the full details thereof.                                                                                
                                                       OPINION                                                         
                     We have carefully reviewed the rejection on appeal in light of the arguments of the               
              appellants and the examiner.  As a result of this review, we have determined that the applied prior      
              art establishes the prima facie obviousness of all the claims on appeal.  Appellants have not            
              furnished any further evidence rebutting the prima facie case.  Therefore we affirm the rejection of     
              all the claims on appeal.  Our reasons follow.                                                           
                     The following are findings of fact as to the scope and content of the prior art and the           
              difference between the claimed subject matter and the prior art.  Guo discloses an apparatus for         
              processing a semiconductor wafer.  Specifically, the device is for etching a wafer using a captive       
              plasma.  Guo uses a vacuum chamber 11 to receive a semiconductor wafer (not shown) on a                  
              conductive pedestal 22.  Yoshida also discloses an apparatus to etch a semiconductor wafer.              
              Yoshida, in the embodiment of Figure 7, discloses a chamber lid or wall with a Faraday shield or         
              metallic plate 1a and a heater lb embedded therein.  This embodiment of Yoshida also has an rf coil      
              1.  Thus, Yoshida differs from the claimed subject matter in that, in Yoshida the heater and Faraday     

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