Appeal No. 2006-0380
Application 10/445,783
(col. 4, lines 13-50). The make before break circuit provides
non-overlap delay between the time when the PMOS driver turns off
and the NMOS driver turns on, and vice versa (col. 4, lines 51-
58; col. 5, lines 43-65).
The appellants argue that inverters 218 and 228 are
connected to slew rate control circuit 106 and, therefore, are
not directly connected, respectively, to transistors 240 and 241
(brief, page 11).
Nolan’s inverters 218 and 228 are connected in parallel
with, respectively, capacitors 236 and 238 of the slew rate
circuit and transistors 240 and 241 of the output buffer
(figure 2). Inverters 218 and 228, therefore, are directly
connected to both capacitors 236 and 238, respectively, and
transistors 240 and 241, respectively.
Accordingly, we affirm the rejection over Nolan.
DECISION
The rejections of claims 1, 3 and 15-17 under 35 U.S.C.
§ 102(b) over McClure, and of claims 1-3 and 15-17 under 35
U.S.C. § 102(e) over Nolan, are affirmed.
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