Ex Parte Gary - Page 3




              Appeal No. 2006-0750                                                                                         
              Application No. 09/877,320                                                                                   

                     The examiner finds that claim 1 is anticipated by Song.  Appellant argues in the                      
              Brief that Song does not disclose the software interrupt, when triggered, moving a                           
              message along a message path that supports communication between the data                                    
              processors.  According to appellant, Song discloses software interrupts that are simply                      
              the generation of interrupts on the second processor as triggered by software on the                         
              first processor.  Appellant contends there is no connection to moving messages.                              
                     The examiner responds in the Answer that the relevant claim language is quite                         
              broad.  The examiner relies, in particular, on Song column 9, lines 10 through 26 and                        
              Figure 9, and its accompanying description, as meeting the terms of the claim.                               
              Appellant responds, in turn, in the Reply Brief that the presently claimed invention is a                    
              software only solution and does not require extensions to the process or instruction set.                    
                     As the title of the Song patent specifies, the reference describes a system and                       
              method for handling software interrupts with argument passing.  A program executing                          
              on a first processor interrupts a second processor by executing a software interrupt                         
              instruction.  Song Abstract.  The flowchart for interrupt and exception handling with                        
              respect to vector processor 206 and control processor 204 (Fig. 2) is shown in Figure 9,                     
              and described at column 14, line 37 et seq.  The vector processor 206 does not include                       
              a capability to handle exceptions.  Instead, exceptions and reset initialization are                         
              handled by control processor 204.  When the vector processor 206 detects an exception                        
              condition, rather than servicing the condition, it sends an interrupt signal to the control                  
              processor 204 and enters an idle state.  While the vector processor 206 is in an idle                        
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