Appeal 2007-0287
Application 10/705,347
OPINION
We determine the following factual findings from the record in this
appeal:
(1) Colombo and Doyle disclose methods for forming a field-effect
transistor on a substrate, including placing a high-k dielectric layer
over the substrate, a gate electrode layer over the high-k dielectric
layer, and etching both layers to form a gate stack (Answer 3-4);3
(2) Colombo and Doyle both teach the benefits of performing a
nitridation process on the gate stack, i.e., to avoid oxidation of the
gate stack layers and facilitate repairing of these layers (Colombo,
¶ [0022]), or to prevent oxidation at the upper interface of the gate
dielectric (Doyle, col. 5, ll. 6-9);
(3) Colombo teaches that nitridation may be accomplished by any
suitable technique (¶ [0011]) and Doyle teaching nitridation by
implanting nitrogen into the polysilicon gate electrode (col. 4, l.
63-col. 5, l. 6);
(4) Colombo suggests that the nitridation can be accomplished by
“plasma nitridation” such as decoupled-plasma-nitridation (DPN)
(page 2, claim 8, and ¶ [0011]);
(5) Colombo teaches that nitriding the sidewalls of a patterned gate
structure, and forming a silicon nitride encapsulation layer along
the sidewalls can be performed in sequence in a single processing
chamber (¶ [0011]);
3 Appellants admit that this part of the claimed process is “a conventional3
transistor fabrication process” (Specification 1:17 – 2:2).
5
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Last modified: September 9, 2013