Appeal 2007-0665
Application 09/772,986
importance subject to routine experimentation and optimization.” (Answer
7). “[W]here the general conditions of a claim are disclosed in the prior art,
it is not inventive to discover the optimum or workable ranges by routine
experimentation.” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235
(CCPA 1955).
Further, although Appellants’ arguments point to their drawing
Figures 3 and 4 in support of their position, we find no evidence of criticality
of the claimed gate thickness value of 90 nm or, for that matter, of any
particular value below 100 nm. Accordingly, since it is our opinion that the
Examiner’s prima facie case of obviousness has not been overcome by any
convincing arguments from Appellants, the Examiner’s 35 U.S.C. § 103(a)
rejection, based on Hisao, of dependent claims 14 and 16, is sustained.
REJECTION UNDER 37 C.F.R. § 41.50(b)
We make the following new ground of rejection using our authority
under 37 C.F.R. § 41.50(b).
Claims 1-8, 13, and 15 are rejected under 35 U.S.C. § 103(a) as being
unpatentable over Hisao. With respect to claims 1-8, 13, and 15, Hisao
discloses a thin film semiconductor display device having an insulating
substrate 1, pixels 14 in matrix form, and thin film transistors 3 with a
bottom gate structure. This bottom gate structure has a gate electrode 5, a
gate insulating film 4 and a polycrystalline thin film 2 stacked in the order
from below upward. The gate electrode 5, constructed of an upper layer 5a
with low thermal conductivity and a lower layer 5b with high thermal
conductivity, has a combined gate thickness of about 100-500 nm (Hisao,
¶ 0012) which overlaps the claimed range of “less than 100 nm” since the
8
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