Appeal 2007-0898
Application 09/962,786
The Appellants' claimed invention is directed to a method of making
on-chip integrated circuit decoupling capacitors that, according to
Appellants, may serve to prevent voltage drop on the power grid for high
surge current conditions. The method entails, inter alia, forming a top
electrode barrier on the top electrode with the provision that the top
electrode comprises a material that is more electrically conductive than the
material of the top electrode. For example, the top electrode barrier may be
Ta whereas the top electrode may be TaN.
Appealed claims 1, 2 and 4 stand rejected under 35 U.S.C. § 103(a) as
being unpatentable over Dalton in view of Shimada. Claims 6, 8, and 10
stand rejected under 35 U.S.C. § 103(a) as being unpatentable over the stated
combination of references further in view of Kirlin and Sze. In addition,
claim 9 stands rejected under 35 U.S.C. § 103(a) as being unpatentable over
Dalton in view of Shirmada, Kirlin, Sze, and Kang.
We have thoroughly reviewed the respective positions advanced by
Appellants and the Examiner. In so doing, we find ourselves in agreement
with Appellants that the Examiner has failed to establish a prima facie case
of obviousness for the claimed method. Accordingly, we will not sustain the
Examiner's rejections.
The Examiner appreciates that Dalton fails to teach the presently
claimed top electrode barrier layer. Hence, the Examiner applies Shimada
for evidencing the obviousness of including a top electrode barrier layer on
the top electrode of Dalton. However, as emphasized by Appellants,
Shimada fails to teach that the top electrode barrier material is one that is
more electrically conductive than the material of the top electrode, as
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Last modified: September 9, 2013