Ex Parte Chatty et al - Page 5

                Appeal 2007-1360                                                                              
                Application 10/605,699                                                                        
                device and Appellants’ injector site which, Appellants argue, is located                      
                “within the semiconductor structure.”  It is apparent to us, however, that, to                
                whatever extent Appellants are relying on a particular physical location of                   
                the claimed injector site relative to the overall CMOS semiconductor device                   
                to distinguish over Kim, no such physical location is specified in the claims.                
                It is our opinion that Appellants’ arguments improperly attempt to narrow                     
                the scope of the claim by implicitly adding disclosed limitations which have                  
                no basis in the claim.  See In re Morris, 127 F.3d 1048, 1054-55, 44                          
                USPQ2d 1023, 1027-28 (Fed. Cir. 1997).                                                        
                      We are further of the view, after reviewing Appellants’ Specification,                  
                that there is simply no support in Appellants’ disclosure for the                             
                interpretation of the claim language “injection site associated with said                     
                CMOS semiconductor structure” urged by Appellants in the Briefs.  For                         
                example, paragraph [0042], lines 8-11 of Appellants’ Specification states                     
                “[t]hus, an injector represents any possible source, or combination of                        
                sources, of current to the IC, either internal current injector (on-chip                      
                injector) or external current injector (off-chip injector).”                                  
                      Further, as with Appellants’ earlier arguments, we find Appellants’                     
                contention (Br. 8; Reply Br. 4) that Kim’s latch-up prevention guard ring                     
                structure, which is placed under the data I/O pad, is not applicable to modern                
                CMOS technologies to be not commensurate with the scope of the claims.                        
                We find no language of any kind in independent claims 1 and 22 which                          
                precludes the use of latch-up preventing guard rings as disclosed by Kim.                     
                      In view of the above discussion, since all of the claimed limitations                   
                are present in the disclosure of Kim, the Examiner’s 35 U.S.C. § 102(b)                       
                rejection, based on Kim, of independent claims 1 and 22, as well as                           

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