Appeal 2007-1647
Application 10/631,841
(quoting In re Rouffet, 149 F.3d 1350, 1355 (Fed. Cir. 1998)). Therefore, we
look to Appellant’s Brief to show error in the proffered prima facie case.
Appellant points out that the capacitor in Rapp is connected to a
ground reference point, and thus does not charge couple the biasing node to
the lower supply voltage such that the voltage at the biasing node follows the
lower supply voltage (Br. 19-20). Appellant notes that the circuit of Rapp
provides a comparator circuit that compares the voltage value of a
programming voltage supply VPP at node A of Fig. 5 against the voltage
value of the power supply voltage VDD. Appellant notes that Rapp’s
capacitor helps “to hold the voltage constant at the gate of transistor 86” (See
Rapp, col. 9, ll. 41-42). In particular, Appellant argues that holding the
voltage constant at the transistor gate (as taught by Rapp) does not provide
the coupling of the lower supply voltage to the biasing node as required by
the claims of the instant invention (Br. 20). Appellant further contends that
the Examiner has failed to provide a sufficient basis to show that the
combination of AAPA with Rapp would have been obvious to one skilled in
the art (Id.).
The Examiner disagrees. The Examiner contends that Fig. 5 of Rapp
shows large capacitor (90) coupled between the bias node (i.e., the gate of
transistor 86) and a lower supply voltage of the Fig. 5 circuit, such that when
combined with the AAPA circuit (Fig. 1), then the capacitor 90 in Fig. 5 of
Rapp will be connected between the bias node (b1, Fig. 1 of AAPA) and the
lower supply voltage Vss of input buffer 100 (Figure 1 of AAPA), and thus
the capacitor (90) in the combination/modification will charge couple the
biasing node bl to the lower supply voltage Vss (Answer 10).
10
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