Ex parte YOSHIDA et al. - Page 2




          Appeal No. 95-1555                                                          
          Application 07/871,530                                                      


          manufacturing it.  Appellants disclose on pages 11 through 14 of            
          the specification that Figure 1 is a first embodiment of a                  
          dynamic RAM memory cell.  Appellants disclose on page 12 of the             
          specification that the memory cell contains a p -type substrate--                           
          (81) and a highly concentrated p -type semiconductor layer (80)-                                           
          formed over the p -type substrate (81).  Appellants disclose--                                                         
          that the semiconductor layer (80) has a higher concentration than           
          the p -type substrate (81).   Appellants’ claims 10 through 15--                                                                     
          are directed to this embodiment.                                            
               On pages 18 and 19 of the specification, Appellants disclose           
          another embodiment of their invention as shown in Figure 18.                
          Appellants disclose that the memory cell contains a n-type                  
          substrate (101) with a p -type semiconductor layer (100) formed-                                                   
          over the n-type substrate (101).  In addition, a higher                     
          concentrated p-type semiconductor layer (80) is formed over the             
          p -type semiconductor layer (100).  Appellants’ claims 16 through-                                                                          
          21 are directed to this second embodiment.                                  
               Independent claims 10 and 16 are reproduced as follows:                
               10.  A semiconductor integrated circuit device comprising:             
               a semiconductor substrate of a first conductivity type;                
               a layer of semiconductor material of said first conductivity           
          type but of increased dopant concentration in relation to said              


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