Ex parte TOSIHIRO FUSAYASU et al. - Page 2




          Appeal No. 96-2821                                                          
          Application 08/015,007                                                      
               2.   Applicants filed the subject application on 9 February            
          1993.  (Paper 1 at 1.)  They claim the benefit under 35 U.S.C.              
          § 119 of Japanese patent applications 4-026368, filed 13 February           
          1992, and 5-009106, filed 22 January 1993.  (Decl. at 1.)  The              
          real party-in-interest is Mitsubishi Denki K.K.  Applicants have            
          not identified any other proceeding that might affect, or be                
          affected by, this appeal.  (Paper 30 at 1.)                                 
               3.   The invention is entitled "Cu/Mo/Cu CLAD MOUNTING FOR             
          HIGH FREQUENCY DEVICES".  (Paper 10 at 1.)  We presume that                 
          "Cu/Mo/Cu" has its ordinary meaning of a copper/molybdenum/copper           
          laminate.                                                                   
               4.   The subject matter of the claimed invention is a                  
          semiconductor having a ceramic dual-in-line package (CERDIP) type           
          of package.  (Paper 1 at 1.)  According to Applicants, "with the            
          recent spread of data communication equipment[] using high                  
          frequency [gallium arsenide] GaAs devices, etc., an inexpensive             
          semiconductor package with high heat transfer and suitable for              
          high frequency devices has been increasingly demanded."  (Paper 1           
          at 2-3.)  They note that cost, temperature, weight, and ability             
          to handle high frequencies are all problems in the art.  (Paper 1           
          at 3.)                                                                      
               5.   Applicants address the problems with the semiconductor            
          package shown in Figure 4(a).  They fabricate a base plate 11               

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