Ex parte KAMIYA et al. - Page 3




          Appeal No. 96-01612                                                         
          Application 08/006,152                                                      



               As evidence of obviousness, the examiner relies on the                 
          following prior art:                                                        
          Nickl                         3,506,508           Apr. 14, 1970             
          Tsunashima et al.                                                           
          (Tsunashima)                  4,791,074           Dec. 13, 1988             
                                                  (Filed Jul. 15, 1987)               
          Schachameyer et al.                                                         
          (Schachameyer)                4,940,505           July 10, 1990             
                                                  (Filed Dec. 2, 1988)                
          Ito (Japanese Kokai                                                         
          Patent Publication)           63-166220           July 9, 1988              
          Silicon Processing for the VLSI ERA , Vol. 1: Process Technology,           
          Wolf et al., Lattice Press, Sunset Beach, California, 1986, pp              
          64-65 (hereinafter referred to as “Wolf”).                                  
          Appellants’ admission at pages 1 and 2 of the specification                 
          (hereinafter referred to as “admitted prior art”).                          
               Claims 1 through 28 stand rejected under 35 U.S.C. § 103 as            
          unpatentable over the combined teachings of Tsunashima, Ito,                
          Wolf, the admitted prior art and either Nickl or Schachameyer.              
               We reverse.                                                            
               The subject matter on appeal is directed to “a method of               
          producing a semiconductor device in the form of a metal insulator           
          semiconductor field effect transistor (hereinafter, referred to             
          as a “MISFET”) used in electronic instruments such as computers.”           
          See specification, page 1, lines 1-8.  The method initially                 
          involves removing an inert film from semiconductor regions of               


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