Ex parte RODDER - Page 2




          Appeal No. 97-3299                                                          
          Application 08/481,900                                                      




          final rejection of claims 26, 28-30, 32-37 and 39.                          


               Representative claim 26 is reproduced below:                           
               26.  A method of forming a microelectronic device, said                
          device incorporating connecting structures between regions,                 
          the method comprising:                                                      
               a.  providing a substrate having a first region;                       
               b.  forming a first insulating layer over said substrate;              
               c.  removing selected portions of said first insulating                
          layer so as to at least partially expose said region, forming               
          a cavity above said exposed region;                                         
               d.  forming a layer of semiconductor material on said                  
          first insulating layer and said cavity so as to make contact                
          with said first region, said layer of semiconductor material                
          being formed with a thickness sufficient to partially fill                  
          said cavity and to prevent dopants from subsequent doping                   
          operations from penetrating to said first region;                           
               e.  forming a second insulating layer over said                        
          semiconductor layer;                                                        
               f.  removing selected portions of said second insulating               
          layer so as to at least partially expose said semiconductor                 
          layer; and                                                                  
               g.  forming an interconnective layer over said second                  
          insulating layer and in electrical communication with said                  
          exposed semiconductor layer.                                                

               There are no references relied on by the examiner.                     

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