Ex parte JEON et al. - Page 4




          Appeal No. 96-0974                                                          
          Application 08/024,299                                                      


          address DA, a sender address SA, an information portion, and                
          an error detection portion EC (col. 1, lines 61-65; col. 2,                 
          lines 43-49).  During transmission, the transmitting station                
          (e.g., S1) simultaneously applies the transmitted signal to                 
          both transmission lines via transmission drivers 2a and 2b                  
          (col. 2, lines 43-46).  At the receiving station, the signals               
          received on lines A and B are coupled via receiving drivers 3a              
          and 3b, respectively, to                                                    
          input terminals of a changeover switch 4 for selectively                    
          connecting one or the other of the received transmission line               
          signals to the input of receiving circuit 5 (col. 2, lines                  
          50-55).  The state of the switch is controlled by a                         
          transmission line check circuit 6, sender address detection                 
          circuits 8a and 8b, and abnormality check circuit 9 (col. 2,                
          lines 58-68).  These circuits determine whether the                         
          transmission lines are normal or abnormal and the results of                
          this analysis are fed to CPU 10, which operates changeover                  
          switch 4, if necessary, to connect a normal signal to the                   
          input of receiving circuit 5 (col. 3, lines 1-12).  The CPU                 
          includes a display control circuit 11 through which the check               


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