Appeal No. 96-1319
Application 07/934,982
Claim 12 recites a system in which the central processing unit “offloads a task to
said integrated circuit to be executed by said processor.” Witt specifically discloses that
the advantage of a smart memory is that tasks can be offloaded from the host system
computer to the smart memory processors [column 2, lines 49-52]. Therefore, we sustain
the rejection of the invention as broadly recited in claim 12.
Claim 13 recites a system in which the processor “is halted during accesses to said
integrated circuit.” The examiner views this halting operation as equivalent to the
prevention of the processor from executing as recited in the independent claims [answer,
page 12]. Appellants traverse this position for the same reasons discussed with respect
to the independent claims [reply brief, page 5].
As we noted above with respect to claims 1, 11 and 16, the processor of the smart
memory resulting from the teachings of Nicoud, Witt and Nusinov would not be connected
at all when it is inserted into an existing system where the unused external lead remains
disconnected. Thus, the processor is not operational, or is halted, during external
accesses from such an existing system. We also observe that the artisan familiar with the
operation of computers would have found it obvious to broadly halt the operation of a
device when a higher priority request is made for the device. Since access of the smart
device from an external host system is clearly more important than its internal processing,
we sustain the rejection of the invention as broadly recited in claim 13.
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