Ex parte MIFSUD et al. - Page 2




          Appeal No. 96-1983                                                          
          Application No. 08/222,784                                                  


          constitute all the claims in the application.  An amendment                 
          after final rejection was filed on May 08, 1995 but was denied              
          entry by the examiner [Paper no. 10].                                       
          The invention pertains to a circuit which identifies                        
          defective redundant word lines in a Static Random Access                    
          Memory (SRAM) macro provided with an Array Built-In Self-Test               
          (ABIST) unit and a redundant mechanism.  Specifically, the                  
          structure detects failures in a manner which permits a two-                 
          pass fuse blow process.  The second fuse blow can be performed              
          either in a manufacturing environment, before or after burn-                
          in, or in a system environment should electrical fuses be                   
          available.                                                                  
          Representative claim 1 is reproduced as follows:                            
               1.   A circuit for allowing a two-pass fuse blow to an                 
                    integrated circuit of a memory type comprising:                   
                    i) memory means having a plurality of word lines,                 
          said   memory including:                                                    
                    a standard array,                                                 
                    a redundant array provided with redundant word                    
          lines,                                                                      
                    a decoder means coupled to said standard array, and               
                    comparator means coupled to said redundant array and              
          to said decoder means;                                                      
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