Ex parte WAKELAND et al. - Page 8




          Appeal No. 96-4169                                                          
          Application 08/378,066                                                      



          ISA computer.  Raasch teaches that the peripheral controller                
          enters a low power mode of                                                  


          operation while it awaits an interrupt from various devices,                
          rather than actively polling these devices to determine which               
          device or devices need service.  In column 1, lines 53-58,                  
          Raasch teaches that in laptop computers in which power                      
          consumption is critical, it is important to consider any way                
          to reduce the power consumption.  In column 2, lines 6-14,                  
          Raasch discloses that conventional designs provide that the                 
          peripheral controller continuously polls various devices to                 
          determine if any data transferred from the keyboard is                      
          required.  Power is unnecessarily consumed in these active                  
          polling processes.  In column 2, lines 50-57, Raasch teaches                
          that they have solved this unnecessary power consumption by                 
          utilizing memory mapped address decode architecture.  In                    
          column 2, line 63, through column 3, line 4, Raasch discloses               
          that their invention provides an interrupt controller for an                
          interrupt driven peripheral controller for use in a host                    
          Industrial Standard Architecture  compatible computer system,               

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