Ex parte ROBERTSON et al. - Page 2




          Appeal No. 1998-0072                                                        
          Application No. 08/476,786                                                  


          66-73, which constituted all the pending claims in the                      
          application.  An amendment after final rejection was filed on               
          January 7, 1997 and was entered by the examiner.  This                      
          amendment amended claims 60 and 66 and cancelled claims 62-64,              
          67, 72 and 73.  In response to this amendment, the examiner                 
          indicated that claims 68-71 were now directed to patentable                 
          subject matter.  Therefore, only claims 60 and 66 remain on                 
          appeal.                                                                     
          The disclosed invention pertains to a multifunction                         
          access circuit for use with first and second digital computers              
          which can communicate with each other.  More specifically, the              
          invention consists of a dual-ported register file having first              
          and second address decoders associated therewith.  At least                 
          one of the address decoders is programmable to position it in               
          an address space of a corresponding one of the computers.                   
          Representative claim 60 is reproduced as follows:                           
               60.       A multifunction access circuit for use with                  
          first and second digital computers each having an address bus               
          for supplying addresses and a data bus for transferring data,               
          the access circuit comprising:                                              
               a register file having a first data port including inputs              
          and outputs connected to the data bus of the first digital                  
          computer and a second data port including inputs and outputs                
          connected to the data bus of the second digital computer, said              
          register file having a plurality of storage locations for                   
                                         -2-                                          





Page:  Previous  1  2  3  4  5  6  7  8  9  10  11  Next 

Last modified: November 3, 2007