Appeal No. 1998-0706
Application 08/166,279
applicant can overcome a rejection by showing
insufficient evidence of prima facie obviousness or
by rebutting the prima facie case with evidence of
secondary indicia of nonobviousness. See id.
Appellants challenge the sufficiency of the evidence on which
the examiner's prima facie case is based.
E. The merits of the § 103 rejection based on Allen alone
Comparing claim 16 to Figure 3 of Allen, the examiner
reads the claimed interprocessor bus means onto busses 12a-n,
the claimed plurality of link means onto data links 22a-d and
24a-d, the claimed interface means onto cluster modules 18a-n.
As for the claimed components of a cluster module (shown in
Figure 4), the examiner reads the first means and third means
onto cluster module controller 32 (col. 6, ll. 4-13) and reads
the second means onto LEFT OUTQ BUFFER 40 and RIGHT OUTQ
BUFFER 42. The examiner correctly concedes that Allen does
not disclose having the first circuit means communicate all
data received from the link means to the interprocessor means,
as required by the claim. While Allen's cluster module
temporarily stores all of the data received from the link
means in buffer memory 34 (col. 8, ll. 25-35 and 48-52), the
only stored data that is then passed on to local
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