Ex Parte DEHAVEN et al - Page 2



          Appeal No. 1998-0908                                                        
          Application No. 08/506,292                                                  

          distribution wafer (CDW) in Appellants’ specification.  A face-             
          to-face connection from the product wafer to the stimulus wafer             
          is made through a compliant interconnect media.  External                   
          connectors and conductors provided on the stimulus wafer transmit           
          and receive test and control information to and from an external            
          tester.                                                                     
               Claim 57 is illustrative of the invention and reads as                 
          follows:                                                                    
               57.  A method for stimulating a product wafer using a                  
          stimulus wafer, the method comprising the steps of:                         
               providing the product wafer wherein the product wafer                  
          comprises a plurality of product integrated circuits which are to           
          be stimulated, the product wafer having a selectively exposed top           
          conductive layer of material coupled to the product integrated              
          circuits;                                                                   
               providing the stimulus wafer wherein the stimulus wafer                
          comprises a plurality of stimulus circuits wherein at least one             
          stimulus circuit within the plurality of stimulus circuits                  
          corresponds to one product integrated circuit within the                    
          plurality of product integrated circuits, the stimulus wafer                
          having a selectively exposed top conductive layer of material               
          coupled to the stimulus circuits; and                                       
               positioning a compliant interconnect media between product             
          wafer and the stimulus wafer, the compliant interconnect media              
          coupling the selectively exposed top conductive layer of material           










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