Ex parte ECCLESINE - Page 9




          Appeal No. 1998-2749                                                        
          Application 08/637,062                                                      

          Examiner finds that Hausman teaches DMA control circuitry on an             
          Application Specific Integrated Circuit (ASIC) and a DMA                    
          controller which is off chip to issue commands to control the               
          adapter 10 which contains the DMA control circuit (EA8).                    
               Hausman discloses that DMA circuitry is contained within host          
          interface 200 (col. 8, lines 10-11), which is within the ASIC               
          chip, and then refers to the DMA controller (col. 8, lines 19 and           
          23), implying that the DMA controller is part of the DMA circuitry          
          on the ASIC chip and not off chip.  While the host DMA ring buffer          
          is off chip in the host memory (col. 8, lines 6-10), this is not a          
          DMA controller.  Claim 29 is not anticipated because it does not            
          teach locating the DMA controller external to the chip.  While the          
          decision as to whether to locate functional components, such as             
          the DMA controller, on or off a chip may be within the level of             
          ordinary skill in the art, the rejection here is based on                   
          anticipation, not obviousness.  Accordingly, the rejection of               
          claim 29 is reversed.  Hausman expressly discloses the internal             
          buffer, RX RAM FIFO 170, provided on the ASIC as recited in                 
          claim 30; however, because claim 30 depends on claim 29, the                
          rejection of claim 30, and its dependent claim 31, is reversed.             



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